关键词：rk3288-fpga.dts ,linux_3.10,rockchip,dts
dts — rk3288-fpga.dts
/dts-v1/; #include <dt-bindings/clock/ddr.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/rkfb/rk_fb.h> #include <dt-bindings/suspend/rockchip-pm.h> #include <dt-bindings/sensor-dev.h> #include "skeleton.dtsi" #include "rk3288-pinctrl.dtsi" / { interrupt-parent = <&gic>; aliases { serial2 = &uart_dbg; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; lcdc0 = &lcdc0; lcdc1 = &lcdc1; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x500>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x501>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x502>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x503>; }; }; gic: interrupt-controller@ffc01000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; #address-cells = <0>; reg = <0xffc01000 0x1000>, <0xffc02000 0x1000>; }; sram: sram@ff710000 { compatible = "mmio-sram"; reg = <0xff710000 0x8000>; /* 32k */ map-exec; }; timer { compatible = "arm,armv7-timer"; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; clock-frequency = <24000000>; }; timer@ff810000 { compatible = "rockchip,timer"; reg = <0xff810000 0x20>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; rockchip,broadcast = <1>; }; timer@ff810020 { compatible = "rockchip,timer"; reg = <0xff810020 0x20>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; rockchip,clocksource = <1>; rockchip,count-up = <1>; }; uart_dbg: serial@ff690000 { compatible = "rockchip,serial"; reg = <0xff690000 0x100>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <24000000>; reg-shift = <2>; reg-io-width = <4>; status = "disabled"; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <2>; rockchip,signal-irq = <106>; rockchip,wake-irq = <0>; status = "disabled"; }; i2c0: i2c@ff650000 { compatible = "rockchip,rk30-i2c"; reg = <0xff650000 0x1000>; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; i2c1: i2c@ff140000 { compatible = "rockchip,rk30-i2c"; reg = <0xff140000 0x1000>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; i2c2: i2c@ff660000 { compatible = "rockchip,rk30-i2c"; reg = <0xff660000 0x1000>; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; i2c3: i2c@ff150000 { compatible = "rockchip,rk30-i2c"; reg = <0xff150000 0x1000>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; i2c4: i2c@ff160000 { compatible = "rockchip,rk30-i2c"; reg = <0xff160000 0x1000>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; i2c5: i2c@ff170000 { compatible = "rockchip,rk30-i2c"; reg = <0xff170000 0x1000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; rockchip,check-idle = <0>; status = "disabled"; }; lvds: lvds@ff96c000 { compatible = "rockchip, rk32-lvds"; reg = <0xff960000 0x20000>; }; edp: edp@ff970000 { compatible = "rockchip,rk32-edp"; reg = <0xff970000 0x4000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; }; hdmi: hdmi@ff980000 { compatible = "rockchip,rk3288-hdmi"; reg = <0xff980000 0x20000>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; rockchip,hdmi_lcdc_source = <1>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&i2c5_sda &i2c5_scl>; pinctrl-1 = <&i2c5_gpio>; status = "disabled"; }; fb: fb{ compatible = "rockchip,rk-fb"; rockchip,disp-mode = <DUAL>; }; rk_screen: rk_screen{ compatible = "rockchip,screen"; }; lcdc1: lcdc@ff940000 { compatible = "rockchip,rk3288-lcdc"; rockchip,prop = <PRMRY>; rochchip,pwr18 = <0>; reg = <0xff940000 0x10000>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&lcdc0_lcdc>; pinctrl-1 = <&lcdc0_gpio>; status = "disabled"; }; lcdc0: lcdc@ff930000 { compatible = "rockchip,rk3288-lcdc"; rockchip,prop = <EXTEND>; rockchip,pwr18 = <0>; reg = <0xff930000 0x10000>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; //pinctrl-names = "default", "gpio"; //pinctrl-0 = <&lcdc0_lcdc>; //pinctrl-1 = <&lcdc0_gpio>; status = "disabled"; }; adc: adc@ff100000 { compatible = "rockchip,saradc"; reg = <0xff100000 0x100>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; #io-channel-cells = <1>; io-channel-ranges; rockchip,adc-vref = <1800>; clock-frequency = <1000000>; clock-names = "saradc", "pclk_saradc"; status = "disabled"; }; rga@ff920000 { compatible = "rockchip,rga"; reg = <0xff920000 0x1000>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; clock-names = "hclk_rga", "aclk_rga"; }; i2s: rockchip-i2s@0xff890000 { compatible = "rockchip-i2s"; reg = <0xff890000 0x10000>; i2s-id = <0>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; // dmas = <&pdma0 0>, // <&pdma0 1>; //#dma-cells = <2>; // dma-names = "tx", "rx"; }; spdif: rockchip-spdif@0xff8b0000 { compatible = "rockchip-spdif"; reg = <0xff8b0000 0x10000>; //8channel //reg = <ff880000 0x2000>;//2channel interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; // dmas = <&pdma0 8>; //#dma-cells = <1>; }; ion { compatible = "rockchip,ion"; #address-cells = <1>; #size-cells = <0>; ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */ compatible = "rockchip,ion-heap"; rockchip,ion_heap = <4>; reg = <0x00000000 0x04000000>; /* 64MB */ }; rockchip,ion-heap@0 { /* VMALLOC HEAP */ compatible = "rockchip,ion-heap"; rockchip,ion_heap = <0>; }; }; mmc: mshc@ff0c0000 { compatible = "rockchip,rk_mmc"; reg = <0xff0c0000 0x4000>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; /*irq=64*/ #address-cells = <1>; #size-cells = <0>; clock-frequency = <50000000>; clock-freq-min-max = <400000 50000000>; num-slots = <1>; supports-highspeed; broken-cd; card-detect-delay = <200>; pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/ fifo-depth = <0x100>; emmc-compatible = <0>; status = "okay"; }; sdio0: mshc@ff0d0000 { compatible = "rockchip,rk_mmc"; reg = <0xff0d0000 0x4000>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; /*irq=65*/ #address-cells = <1>; #size-cells = <0>; clock-frequency = <50000000>; clock-freq-min-max = <400000 50000000>; num-slots = <1>; supports-highspeed; fifo-depth = <0x100>; emmc-compatible = <0>; status = "disabled"; }; sdio1: mshc@ff0e0000 { compatible = "rockchip,rk_mmc"; reg = <0xff0e0000 0x4000>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; /*irq=66*/ #address-cells = <1>; #size-cells = <0>; clock-frequency = <50000000>; clock-freq-min-max = <400000 50000000>; num-slots = <1>; supports-highspeed; fifo-depth = <0x100>; emmc-compatible = <0>; status = "disabled"; }; emmc: mshc@ff0f0000 { compatible = "rockchip,rk_mmc"; reg = <0xff0f0000 0x4000>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; /*irq=67*/ #address-cells = <1>; #size-cells = <0>; clock-frequency = <50000000>; clock-freq-min-max = <400000 50000000>; num-slots = <1>; supports-highspeed; fifo-depth = <0x100>; emmc-compatible = <1>; status = "disabled"; }; vpu: vpu_service@ff9a0000 { compatible = "vpu_service"; reg = <0xff9a0000 0x800>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irq_enc", "irq_dec"; name = "vpu_service"; status = "disabled"; }; hevc: hevc_service@ff9c0000 { compatible = "rockchip,hevc_service"; reg = <0xff9c0000 0x800>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "irq_dec"; name = "hevc_service"; status = "disabled"; }; iep: iep@ff900000 { compatible = "rockchip,iep"; reg = <0xff900000 0x800>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; dwc_control_usb: dwc-control-usb@ff770284 { compatible = "rockchip,rk3288-dwc-control-usb"; reg = <0xff770284 0x04>, <0xff770288 0x04>, <0xff7702cc 0x04>, <0xff7702d4 0x04>, <0xff770320 0x14>, <0xff770334 0x14>, <0xff770348 0x10>, <0xff770358 0x08>, <0xff770360 0x08>; reg-names = "GRF_SOC_STATUS1" ,"GRF_SOC_STATUS2", "GRF_SOC_STATUS19", "GRF_SOC_STATUS21", "GRF_UOC0_BASE", "GRF_UOC1_BASE", "GRF_UOC2_BASE", "GRF_UOC3_BASE", "GRF_UOC4_BASE"; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "otg_id", "bvalid", "otg_linestate", "host0_linestate", "host1_linestate"; /*gpios = <&gpio0 GPIO_B6 GPIO_ACTIVE_LOW>,*//*HOST_VBUS_DRV*/ /* <&gpio0 GPIO_B4 GPIO_ACTIVE_LOW>;*//*OTG_VBUS_DRV*/ /*clocks = <&clk_gates4 5>;*/ /*clock-names = "hclk_usb_peri";*/ }; usb1: usb@ff580000 { compatible = "rockchip,rk3288_usb20_otg"; reg = <0xff580000 0x40000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; }; usb2: usb@ff540000 { compatible = "rockchip,rk3288_usb20_host"; reg = <0xff540000 0x40000>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; }; usb3: usb@ff520000 { compatible = "rockchip,rk3288_rk_ohci_host"; reg = <0xff520000 0x20000>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; }; usb4: usb@ff500000 { compatible = "rockchip,rk3288_rk_ehci_host"; reg = <0xff500000 0x20000>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; }; usb5: usb@ff5c0000 { compatible = "rockchip,rk3288_rk_ehci1_host"; reg = <0xff5c0000 0x40000>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; }; gmac: eth@ff290000 { compatible = "rockchip,gmac"; reg = <0xff290000 0x10000>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; /*irq=59*/ interrupt-names = "macirq"; phy-mode = "rmii"; //phy-mode = "gmii"; pinctrl-names = "default"; pinctrl-0 = <&mac_clk &mac_txpins &mac_rxpins &mac_mdpins>; }; }; #include "lcd-td043mgeal.dtsi" / { compatible = "rockchip,rk3288-fpga"; memory { device_type = "memory"; reg = <0x00000000 0x10000000>; }; chosen { bootargs = "androidboot.console=ttyFIQ0 initrd=0x02000000,0x00800000"; }; fiq-debugger { status = "okay"; }; rockchip-rt5631 { compatible = "rockchip-rt5631"; dais { dai0 { codec-name = "rt5631.0-001a"; cpu-dai-name = "rockchip-i2s.0"; format = "i2s"; //continuous-clock; //bitclock-inversion; //frame-inversion; //bitclock-master; //frame-master; }; }; }; rockchip-rk610 { compatible = "rockchip-rk610"; dais { dai0 { codec-name = "rk610_codec.0-0060"; cpu-dai-name = "rockchip-i2s.0"; format = "i2s"; //continuous-clock; //bitclock-inversion; //frame-inversion; //bitclock-master; //frame-master; }; }; }; codec-hdmi-spdif { compatible = "hdmi-spdif"; }; codec-hdmi-i2s { compatible = "hdmi-i2s"; }; codec-hdmi-spdif { compatible = "hdmi-spdif"; }; }; &i2c0 { status = "okay"; rt5631@1a { compatible = "rt5631"; reg = <0x1a>; }; rk610ctl@40 { compatible = "rk610_ctl"; reg = <0x40>; rk610-reset-io = <&gpio3 GPIO_B2 GPIO_ACTIVE_HIGH>; // clocks = <&clk_i2s>; // clock-names = "i2s_clk"; }; rk610codec@60 {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80) compatible = "rk610_codec"; reg = <0x60>; spk_ctl_io = <&gpio2 GPIO_D7 GPIO_ACTIVE_HIGH>; boot_depop = <1>; pa_enable_time = <1000>; }; ion { compatible = "rockchip,ion"; #address-cells = <1>; #size-cells = <0>; rockchip,ion-heap@1 { /* CMA HEAP */ compatible = "rockchip,ion-reserve"; reg = <1>; memory-reservation = <0x00000000 0x04000000>; /* 64MB */ }; rockchip,ion-heap@3 { /* SYSTEM HEAP */ reg = <3>; }; }; }; &fb { rockchip,disp-mode = <DUAL>; }; &rk_screen { display-timings = <&disp_timings>; }; &lcdc0 { status = "okay"; power_ctr: power_ctr { rockchip,debug = <0>; rockchip,mirror = <NO_MIRROR>; /*lcd_en:lcd_en { rockchip,power_type = <GPIO>; gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>; rockchip,delay = <10>; }; lcd_cs:lcd_cs { rockchip,power_type = <REGULATOR>; rockchip,delay = <10>; }; lcd_rst:lcd_rst { rockchip,power_type = <GPIO>; gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; rockchip,delay = <5>; };*/ }; }; &lcdc1 { status = "disable"; }; &hdmi { status = "okay"; rockchips,hdmi_audio_source = <0>; }; ;SDMMC_CLKOUT>; rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>; }; sdio0_bus1: sdio0-bus-width1 { rockchip,pins = <SDMMC_DATA0>; rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>; }; sdio0_bus4: sdio0-bus-width4 { rockchip,pins = <SDMMC_DATA0>, <SDMMC_DATA1>, <SDMMC_DATA2>, <SDMMC_DATA3>; rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>; }; sdio0_gpio: sdio0_gpio{ rockchip,pins = <GPIO0_D6>, //pwren <GPIO0_A3>, //cmd <GPIO1_A0>, //clk <GPIO1_A1>, //data0 <GPIO1_A2>, //data1 <GPIO1_A4>, //data2 <GPIO1_A5>; //data3 rockchip,pull = <VALUE_PULL_UPDOWN_DISABLE>; }; }; gpio0_pwm{ pwm0_pin:pwm0 { rockchip,pins = <PWM0>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; pwm1_pin:pwm1 { rockchip,pins = <PWM1>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; pwm2_pin:pwm2 { rockchip,pins = <PWM2>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; pwm3_pin:pwm3 { rockchip,pins = <PWM_IRIN>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; }; gpio2_gmac { gmac_rxdv:gmac-rxdv { rockchip,pins = <GMAC_RXDV>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txclk:gmac-txclk { rockchip,pins = <GMAC_TXCLK>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_crs:gmac-crs { rockchip,pins = <GMAC_CRS>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxclk:gmac-rxclk { rockchip,pins = <GMAC_RXCLK>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_mdio:gmac-mdio { rockchip,pins = <GMAC_MDIO>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txen:gmac-txen { rockchip,pins = <GMAC_TXEN>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_clk:gmac-clk { rockchip,pins = <GMAC_CLK>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxer:gmac-rxer { rockchip,pins = <GMAC_RXER>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxd1:gmac-rxd1 { rockchip,pins = <GMAC_RXD1>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxd0:gmac-rxd0 { rockchip,pins = <GMAC_RXD0>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txd1:gmac-txd1 { rockchip,pins = <GMAC_TXD1>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txd0:gmac-txd0 { rockchip,pins = <GMAC_TXD0>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxd3:gmac-rxd3 { rockchip,pins = <GMAC_RXD3>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_rxd2:gmac-rxd2 { rockchip,pins = <GMAC_RXD2>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txd2:gmac-txd2 { rockchip,pins = <GMAC_TXD2>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_txd3:gmac-txd3 { rockchip,pins = <GMAC_TXD3>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_col:gmac-col { rockchip,pins = <GMAC_COL>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_col_gpio:gmac-col-gpio { rockchip,pins = <GPIO2_D0>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; gmac_mdc:gmac-mdc { rockchip,pins = <GMAC_MDC>; rockchip,pull = <VALUE_PULL_DEFAULT>; }; }; gpio2_lcdc0 { lcdc0_lcdc:lcdc0-lcdc { rockchip,pins = <LCDC0_DCLK>, <LCDC0_DEN>, <LCDC0_HSYNC>, <LCDC0_VSYNC>; rockchip,pull = <VALUE_PULL_DISABLE>; }; lcdc0_gpio:lcdc0-gpio { rockchip,pins = <FUNC_TO_GPIO(LCDC0_DCLK)>, <FUNC_TO_GPIO(LCDC0_DEN)>, <FUNC_TO_GPIO(LCDC0_HSYNC)>, <FUNC_TO_GPIO(LCDC0_VSYNC)>; rockchip,pull = <VALUE_PULL_DISABLE>; }; }; gpio2_lcdc0_d { lcdc0_lcdc_d: lcdc0-lcdc_d { rockchip,pins = <LCDC0_D10>, <LCDC0_D11>, <LCDC0_D12>, <LCDC0_D13>, <LCDC0_D14>, <LCDC0_D15>, <LCDC0_D16>, <LCDC0_D17>; /* <LCDC0_D18>, <LCDC0_D19>, <LCDC0_D20>, <LCDC0_D21>, <LCDC0_D22>, <LCDC0_D23>; */ rockchip,pull = <VALUE_PULL_DISABLE>; }; lcdc0_lcdc_gpio: lcdc0-lcdc_gpio { rockchip,pins = <FUNC_TO_GPIO(LCDC0_D10)>, <FUNC_TO_GPIO(LCDC0_D11)>, <FUNC_TO_GPIO(LCDC0_D12)>, <FUNC_TO_GPIO(LCDC0_D13)>, <FUNC_TO_GPIO(LCDC0_D14)>, <FUNC_TO_GPIO(LCDC0_D15)>, <FUNC_TO_GPIO(LCDC0_D16)>, <FUNC_TO_GPIO(LCDC0_D17)>; /* <FUNC_TO_GPIO(LCDC0_D18)>, <FUNC_TO_GPIO(LCDC0_D19)>, <FUNC_TO_GPIO(LCDC0_D20)>, <FUNC_TO_GPIO(LCDC0_D21)>, <FUNC_TO_GPIO(LCDC0_D22)>, <FUNC_TO_GPIO(LCDC0_D23)>; */ rockchip,pull = <VALUE_PULL_DOWN>; }; }; //to add }; };