关键词:rk3399; rockchip,px30-dmc; rockchip,rk3128-dmc;rockchip,rk3228-dmc;rockchip,rk3288-dmc; rockchip,rk3308-dmc;rockchip,rk3328-dmc;rockchip,rk3368-dmc;rockchip,rk3399-dmc;
rk3399 — dmc dts配置
1、DMC简介:
DMC(Dynamic Memory Controller) ,内存动态频率控制器
2、属性值配置:
- compatible: 可以配置成以下值: - "rockchip,px30-dmc" - for PX30 SoCs. - "rockchip,rk3128-dmc" - for RK3128 SoCs. - "rockchip,rk3228-dmc" - for RK3228 SoCs. - "rockchip,rk3288-dmc" - for RK3288 SoCs. - "rockchip,rk3308-dmc" - for RK3308 SoCs. - "rockchip,rk3328-dmc" - for RK3328 SoCs. - "rockchip,rk3368-dmc" - for RK3368 SoCs. - "rockchip,rk3399-dmc" - for RK3399 SoCs. - devfreq-events: 指向DFI控制器 - interrupts: 配置DMC的中断号 - clocks: 配置DMC的时钟,与clock-names 一一对应; - clock-names : 时钟名称配置成:"pclk_ddr_mon"; - operating-points-v2: 指向内存动态频率表; - center-supply: 配置DMC 供电节点. - status: dmc状态配置
3、以rk3399为例:
Example: ddr_timing: ddr_timing { compatible = "rockchip,ddr-timing"; ddr3_speed_bin = <21>; pd_idle = <0>; sr_idle = <0>; sr_mc_gate_idle = <0>; srpd_lite_idle = <0>; standby_idle = <0>; dram_dll_dis_freq = <300>; phy_dll_dis_freq = <125>; ddr3_odt_dis_freq = <333>; ddr3_drv = <DDR3_DS_40ohm>; ddr3_odt = <DDR3_ODT_120ohm>; phy_ddr3_ca_drv = <PHY_DRV_ODT_40>; phy_ddr3_dq_drv = <PHY_DRV_ODT_40>; phy_ddr3_odt = <PHY_DRV_ODT_240>; lpddr3_odt_dis_freq = <333>; lpddr3_drv = <LP3_DS_34ohm>; lpddr3_odt = <LP3_ODT_240ohm>; phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>; phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>; phy_lpddr3_odt = <PHY_DRV_ODT_240>; lpddr4_odt_dis_freq = <333>; lpddr4_drv = <LP4_PDDS_60ohm>; lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>; lpddr4_ca_odt = <LP4_CA_ODT_40ohm>; phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>; phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>; phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>; phy_lpddr4_odt = <PHY_DRV_ODT_60>; }; dmc_opp_table: dmc_opp_table { compatible = "operating-points-v2"; opp00 { opp-hz = /bits/ 64 <300000000>; opp-microvolt = <900000>; }; opp01 { opp-hz = /bits/ 64 <666000000>; opp-microvolt = <900000>; }; }; dmc: dmc { compatible = "rockchip,rk3399-dmc"; devfreq-events = <&dfi>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_DDRCLK>; clock-names = "dmc_clk"; ddr_timing = <&ddr_timing>; operating-points-v2 = <&dmc_opp_table>; center-supply = <&ppvar_centerlogic>; upthreshold = <15>; downdifferential = <10>; #cooling-cells = <2>; ddr_power_model: ddr_power_model { dynamic-power-coefficient = <120>; static-power-coefficient = <300>; ts = <32000 4700 (-80) 2>; thermal-zone = "soc-thermal"; } status = "disabled"; };