关键词：rk3399; rockchip,rk3399-pcie; 

rk3399 AXI PCIe dts配置，pcie 还会使用到pcie phy的设置，pcie phy dts的配置方法可以查看该文章《RK3399 — PCIE PHY DTS配置》

1、必须属性值：

- #address-cells: Root Port的地址，这里设置为<3>
- #size-cells: Root Port的大小，这里设置为<2>
- #interrupt-cells: 指定需要被设置成中断源的cell，这里设置为1.
- interrupt-map-mask and interrupt-map: 标准PCI 属性值
- compatible: 必须设置为 "rockchip,rk3399-pcie"
- reg: 需要设置两个寄存器地址范围，名字需要与reg-names 一一对应。
- reg-names: 只能是以下两个名字
- "axi-base"
- "apb-base"
- clocks: 与PCIe相关的时钟源，时钟顺序需要与clock-names 一一对应。
- clock-names: 名字只用以下名字
- "aclk"
- "aclk-perf"
- "hclk"
- "pm"
- msi-map: MSI控制器配置，分配msi-specifier数据。
- phys: 指定PCIe PHY. 
- phy-names:  名字必须是 "pcie-phy".
- interrupts: 需要指定三个中断，需与interrupt-names 一一对应
- interrupt-names: 中断的名字只能取如下
- "sys"
- "legacy"
- "client"
- resets: 必须指定7个reset入口，并与reset-names 一一对应。
- reset-names: 名字只能取以下7个。
- "core"
- "mgmt"
- "mgmt-sticky"
- "pipe"
- "pm"
- "aclk"
- "pclk"
- pinctrl-names : 指定pin控制脚的名字
- pinctrl-0: 指定pin控制脚。

2、可选属性值：

- aspm-no-l0s: RC不支持ASPM L0s,这个属性只有RC phy使用24MHz OSC时，才有用。
- ep-gpios: pre-reset的 pin 脚定义
- num-lanes: lanes的数量
- vpcie3v3-supply: 指定3.3v电源
- vpcie1v8-supply: 指定1.8v电源
- vpcie0v9-supply: 指定0.9v电源

3、以rk3399为例：

pcie0: pcie@f8000000 {
compatible = "rockchip,rk3399-pcie";
#address-cells = <3>;
#size-cells = <2>;
clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
clock-names = "aclk", "aclk-perf",
     "hclk", "pm";
bus-range = <0x0 0x1>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
    <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
    <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "sys", "legacy", "client";
assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
assigned-clock-rates = <100000000>;
ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
num-lanes = <4>;
msi-map = <0x0 &its 0x0 0x1000>;
reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>;
reg-names = "axi-base", "apb-base";
resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
<&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> ,
<&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>;
reset-names = "core", "mgmt", "mgmt-sticky", "pipe",
     "pm", "pclk", "aclk";
phys = <&pcie_phy>;
phy-names = "pcie-phy";
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreq>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
pcie0_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};