关键词：rk3399-android.dtsi , linux-4.4, rockchip, dts
dts — rk3399-android.dtsi
/*
* Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/media-bus-format.h>
#include "rk3399-vop-clk-set.dtsi"
/ {
compatible = "rockchip,android", "rockchip,rk3399";
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff1a0000 swiotlb=1 coherent_pool=1m";
};
cpuinfo {
compatible = "rockchip,cpuinfo";
nvmem-cells = <&cpu_id>;
nvmem-cell-names = "id";
};
ramoops_mem: ramoops_mem {
reg = <0x0 0x110000 0x0 0xf0000>;
reg-names = "ramoops_mem";
};
ramoops {
compatible = "ramoops";
record-size = <0x0 0x20000>;
console-size = <0x0 0x80000>;
ftrace-size = <0x0 0x00000>;
pmsg-size = <0x0 0x50000>;
memory-region = <&ramoops_mem>;
};
fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
pinctrl-names = "default";
pinctrl-0 = <&uart2c_xfer>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH 0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
drm_logo: drm-logo@00000000 {
compatible = "rockchip,drm-logo";
reg = <0x0 0x0 0x0 0x0>;
};
secure_memory: secure-memory@20000000 {
compatible = "rockchip,secure-memory";
reg = <0x0 0x20000000 0x0 0x10000000>;
status = "disabled";
};
stb_devinfo: stb-devinfo@00000000 {
compatible = "rockchip,stb-devinfo";
reg = <0x0 0x0 0x0 0x0>;
};
};
rk_key: rockchip-key {
compatible = "rockchip,key";
status = "okay";
io-channels = <&saradc 1>;
vol-up-key {
linux,code = <115>;
label = "volume up";
rockchip,adc_value = <1>;
};
vol-down-key {
linux,code = <114>;
label = "volume down";
rockchip,adc_value = <170>;
};
power-key {
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "power";
gpio-key,wakeup;
};
menu-key {
linux,code = <59>;
label = "menu";
rockchip,adc_value = <746>;
};
home-key {
linux,code = <102>;
label = "home";
rockchip,adc_value = <355>;
};
back-key {
linux,code = <158>;
label = "back";
rockchip,adc_value = <560>;
};
camera-key {
linux,code = <212>;
label = "camera";
rockchip,adc_value = <450>;
};
};
rga: rga@ff680000 {
compatible = "rockchip,rga2";
dev_mode = <1>;
reg = <0x0 0xff680000 0x0 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
clock-names = "aclk_rga", "hclk_rga", "clk_rga";
power-domains = <&power RK3399_PD_RGA>;
dma-coherent;
status = "okay";
};
isp0: isp@ff910000 {
compatible = "rockchip,rk3399-isp", "rockchip,isp";
reg = <0x0 0xff910000 0x0 0x4000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&cru SCLK_CIF_OUT_SRC>;
assigned-clock-parents = <&cru PLL_GPLL>;
assigned-clock-rates = <800000000>;
clocks =
<&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT_SRC>,
<&cru SCLK_DPHY_TX1RX1_CFG>, <&cru SCLK_MIPIDPHY_REF>,
<&cru ACLK_ISP0_NOC>, <&cru ACLK_ISP0_WRAPPER>,
<&cru HCLK_ISP0_NOC>, <&cru HCLK_ISP0_WRAPPER>,
<&cru SCLK_ISP0>, <&cru SCLK_DPHY_RX0_CFG>;
clock-names =
"clk_cif_out", "clk_cif_pll",
"pclk_dphytxrx", "pclk_dphy_ref",
"aclk_isp0_noc", "aclk_isp0_wrapper",
"hclk_isp0_noc", "hclk_isp0_wrapper",
"clk_isp0", "pclk_dphyrx";
pinctrl-names =
"cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
"isp_mipi_fl_prefl", "isp_flash_as_gpio",
"isp_flash_as_trigger_out";
pinctrl-0 = <&cif_clkout>;
pinctrl-1 = <&cif_clkout &isp_dvp_d0d7>;
pinctrl-2 = <&cif_clkout>;
pinctrl-3 = <&cif_clkout &isp_prelight>;
pinctrl-4 = <&isp_flash_trigger_as_gpio>;
pinctrl-5 = <&isp_flash_trigger>;
rockchip,isp,mipiphy = <2>;
rockchip,isp,cifphy = <1>;
rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
rockchip,isp,iommu-enable = <1>;
power-domains = <&power RK3399_PD_ISP0>;
iommus = <&isp0_mmu>;
status = "disabled";
};
isp1: isp@ff920000 {
compatible = "rockchip,rk3399-isp", "rockchip,isp";
reg = <0x0 0xff920000 0x0 0x4000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
clocks =
<&cru ACLK_ISP1_NOC>, <&cru ACLK_ISP1_WRAPPER>,
<&cru HCLK_ISP1_NOC>, <&cru HCLK_ISP1_WRAPPER>,
<&cru SCLK_ISP1>, <&cru SCLK_CIF_OUT>,
<&cru SCLK_CIF_OUT_SRC>, <&cru SCLK_DPHY_TX1RX1_CFG>,
<&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_ISP1_WRAPPER>,
<&cru SCLK_DPHY_RX0_CFG>, <&cru PCLK_MIPI_DSI1>,
<&cru SCLK_MIPIDPHY_CFG>;
clock-names =
"aclk_isp1_noc", "aclk_isp1_wrapper",
"hclk_isp1_noc", "hclk_isp1_wrapper",
"clk_isp1", "clk_cif_out",
"clk_cif_pll", "pclk_dphytxrx",
"pclk_dphy_ref", "pclk_isp1",
"pclk_dphyrx", "pclk_mipi_dsi",
"mipi_dphy_cfg";
pinctrl-names =
"cif_clkout", "isp_dvp8bit0", "isp_mipi_fl",
"isp_mipi_fl_prefl", "isp_flash_as_gpio",
"isp_flash_as_trigger_out";
pinctrl-0 = <&cif_clkout>;
pinctrl-1 = <&isp_dvp_d0d7>;
pinctrl-2 = <&cif_clkout>;
pinctrl-3 = <&isp_prelight>;
pinctrl-4 = <&isp_flash_trigger_as_gpio>;
pinctrl-5 = <&isp_flash_trigger>;
rockchip,isp,mipiphy = <2>;
rockchip,isp,cifphy = <1>;
rockchip,isp,dsiphy,reg = <0xff968000 0x8000>;
rockchip,grf = <&grf>;
rockchip,cru = <&cru>;
rockchip,gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
rockchip,isp,iommu-enable = <1>;
power-domains = <&power RK3399_PD_ISP1>;
iommus = <&isp1_mmu>;
status = "disabled";
};
uboot-charge {
compatible = "rockchip,uboot-charge";
rockchip,uboot-charge-on = <1>;
rockchip,android-charge-on = <0>;
};
firmware {
android {
compatible = "android,firmware";
fstab {
compatible = "android,fstab";
system {
compatible = "android,system";
dev = "/dev/block/platform/fe330000.sdhci/by-name/system";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait,verify";
};
vendor {
compatible = "android,vendor";
dev = "/dev/block/platform/fe330000.sdhci/by-name/vendor";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait,verify";
};
};
};
};
};
&uart2 {
status = "disabled";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&hdmi {
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <0>;
ddc-i2c-scl-high-time-ns = <9625>;
ddc-i2c-scl-low-time-ns = <10000>;
status = "okay";
};
&display_subsystem {
status = "okay";
ports = <&vopb_out>, <&vopl_out>;
logo-memory-region = <&drm_logo>;
secure-memory-region = <&secure_memory>;
route {
route_hdmi: route-hdmi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_hdmi>;
};
route_dsi: route-dsi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_dsi>;
};
route_dsi1: route-dsi1 {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopl_out_dsi1>;
};
route_edp: route-edp {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vopb_out_edp>;
};
};
};
&i2s2 {
#sound-dai-cells = <0>;
rockchip,bclk-fs = <128>;
};
&rkvdec {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&vpu {
status = "okay";
};
&pvtm {
status = "okay";
};
&pinctrl {
isp {
cif_clkout: cif-clkout {
rockchip,pins =
/*cif_clkout*/
<2 11 RK_FUNC_3 &pcfg_pull_none>;
};
isp_dvp_d0d7: isp-dvp-d0d7 {
rockchip,pins =
/*cif_data0*/
<2 0 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data1*/
<2 1 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data2*/
<2 2 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data3*/
<2 3 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data4*/
<2 4 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data5*/
<2 5 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data6*/
<2 6 RK_FUNC_3 &pcfg_pull_none>,
/*cif_data7*/
<2 7 RK_FUNC_3 &pcfg_pull_none>,
/*cif_sync*/
<2 8 RK_FUNC_3 &pcfg_pull_none>,
/*cif_href*/
<2 9 RK_FUNC_3 &pcfg_pull_none>,
/*cif_clkin*/
<2 10 RK_FUNC_3 &pcfg_pull_none>;
};
isp_shutter: isp-shutter {
rockchip,pins =
/*SHUTTEREN*/
<1 1 RK_FUNC_1 &pcfg_pull_none>,
/*SHUTTERTRIG*/
<1 0 RK_FUNC_1 &pcfg_pull_none>;
};
isp_flash_trigger: isp-flash-trigger {
/*ISP_FLASHTRIGOU*/
rockchip,pins = <1 3 RK_FUNC_1 &pcfg_pull_none>;
};
isp_prelight: isp-prelight {
/*ISP_PRELIGHTTRIG*/
rockchip,pins = <1 4 RK_FUNC_1 &pcfg_pull_none>;
};
isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio {
/*ISP_FLASHTRIGOU*/
rockchip,pins =
<1 3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};